As a Principal Design Engineer your responsibilities will include the following architecting verification environment for complex SoC's and it's componenets, writing testplan and coverage plan, coding the environment and guiding verification engineers to develop it.
Education Requirement or Equivalent:
BSEE, MSEE or PhD.
Experience Requirement:
7-10 years of relevant experience with 3-5 years of verification experience.
The ideal candidate should have hands on experience with verification environment design, modeling and implementation,using HVL languages like Specman, Vera or System Verilog for at least 5 years. Must have components level and Chip level verification experience.
Special Skills or Knowledge Required:
Must be skilled using Specman, Vera or System Verilog. Experience with Perl is desired. Knowledge and proven experience of using coverage driven verification methodology. Experience of using eRM or SVM methodologies. Knowledge of assertion based verification. SOC verification experience is a plus.
(Dept: : , Req#: 3036)
Posted: 8/27/2008
To be considered for an open position at AMCC, please send your resume to jobs@amcc.com. Be sure to include the word "resume" in the subject line.
