Provide a thorough job description for this position in the format you would like it to appear in the job posting on the AMCC web site. Please follow the guidelines below to ensure all relevant information is included. Job functions will include working with architects, design, verification, and validation in defining, implementing and bringing-up various networking blocks in an SOC. Will have to micro-architect, document, create, and debug design, and work with verification engineers to create comprehensive block and toplevel test and coverage plan.
Education Requirement or Equivalent:
BSEE/MSEE/PhD.
Experience Requirement:
Candidate should have 5+ years of experience with design and micro-architecture of complex chips and minimum 3 years experience with IP networking.
Special Skills or Knowledge Required:
Must have experience with SoC architecture and design with standard SoC busses like AXI, AHB, PLB etc. Good knowledge of Verilog required, SystemVerilog is desired. Packet processing and traffic management experience desired. Must have experience with synthesis, timing, and simulation.
(Dept: : 2771 - SOC Eng TRL, Req#: 3308)
Posted: 8/27/2008
To be considered for an open position at AMCC, please send your resume to jobs@amcc.com. Be sure to include the word "resume" in the subject line.
