As a Principal Design Engineer your responsibilities will include architecting verification environment for complex SoC's and embedded processors , writing testplan and coverage plan, coding the environment and guiding verification engineers to develop it. The role requires an experienced verification engineer who can verify architecture and micro-architecture functionality and performance features of state of the art processor base System on Chip (SoC) with multi-core CPUs.
Education Requirement or Equivalent:
BSEE, MSEE or PhD.
Experience Requirement:
7-10 years of relevant experience with 3- 5 years of verification experience. Essentail skills: . hands on experience with verification environment design, modeling and implementation using HVL languages like System Verilog, Vera, Specman or SystemC . Must have both Block level and full chip level verificatiobn experience . Knowledge and proven experience in coverage driven and assertion based verification methodology. . Experince in in using advance verification methodologies (AVM, SVM, OVM) . Hands on experience of processor verification . CPU architecture knowledge (incl multi processors, cache design, coherency and coherent interconnects)
Special Skills or Knowledge Required:
Desired Skills: . SOC verification experience is plus . Experience with C, C++, perl/python, SystemVerilog . Experience with emulators and Cosim methodolgies
(Dept: : 2771 - SOC Eng TRL, Req#: )
Posted: 8/27/2008
To be considered for an open position at AMCC, please send your resume to jobs@amcc.com. Be sure to include the word "resume" in the subject line.
